The PUSHF instruction saves the PSW including the old INT MASK register. The PSW including the interrupt enable bit are left cleared. If some interrupts need to be enabled while the service routine runs, the INTMASK is loaded with a new value and interrupts are globally enabled before the service routine continues .At the end of the service routine a POPF instruction is executed to restore the old PSW. The RET instruction is executed and the code returns to the desired location. Although the POPF instruction can enable the interrupts the next instruction will always execute. This prevents unnecessary building of the stack by ensuring that the RET always executes before another interrupt vector is taken .

ON-CHIP I/O SECTION

All of the on-chip I/O features of the 8096 can be accessed through the special function registers. The advantage of using register-mapped I/O is that these registers can be used as the sources or destinations of CPU operations. There are seven major I/O functions.

Timer/Counters
The 8096 has two time bases, Timer 1 and Timer 2.Timer 1 is a 16-bit free running timer which is incremented every 8 state times (A state time is 3 oscillator periods or 0.25 microseconds with a 12 MHz crystal ). Its value can be read at any time and used as a reference for both the HSI section and the HSO section. Timer 1 can cause an interrupt when it overflows, and cannot be modified or stopped without resetting the entire chip. Timer 2 is really an event counter since it uses an external clock source. Like Timer 1, it is 16-bits wide, can be read at any time, can be used with the HSO section and can generate an interrupt when it overflows. Control of Timer 2 is limited to incrementing it and resetting it. Specific values can not be written to it.

Although the 8096 has only-two timers the timer flexibility is equal to a unit with many timers because of the HSIO unit. The HSI enables one to measure times of external events on up to four lines using Timer 1 as a timer base. The HSO unit can schedule and execute internal events and up to six external events based on the values in either Timer 1 or Timer 2.The 8096 also includes separate dedicated timers for the baud rate generator and watchdog timer.

HSI
The HSI unit can be thought of as a message taker which records the line which had an event and the time at which the event occurred. 
TheHSI unit can measure pulse widths and record times of events with a 2 microsecond resolution. It can look for one of four events on each of four lines simultaneously based on the information in the HSI Mode register.

The information is then stored in a seven level FIFO for later retrieval. Whenever the FIFO contains information the earliest entry is placed in the holding register. When the holding register is read the next valid piece of information is loaded into it. Interrupts can be generated by the HSI unit at the time the holding register is loaded or when the FIFO has six or more entries

HSO
As the HSI can be thought of as a message taker, the HSO can be thought of as a message sender. At times determined by the software, the HSO sends messages to various devices to have them turn on, turn off, start processing or reset. Since the programmed times can be referenced to either Timer 1 or Timer 2, the HSO makes the two timers look like many .For example if several events have to occur at specific times the HSO unit can schedule all of the events based on a single timer .The events that can be scheduled to occur and the format of the command written to the HSO Command register.

The software timers listed in the figure are actually 4 software flags in I/O Status Register 1 (IOS1). These flags can be set, and optionally cause an interrupt, at any time based on Timer 1 or Timer 2. A multitask process can easily be set up using the software timers. A CAM (Content Addressable Memory) file is the main component of the HSO. This file stores up to eight events which are pending to occur. Every state time one location of the CAM is compared with the two timers. After 8 state times (two microseconds with a 12 MHz clock) the entire CAM has been searched for time matches. If a match occurs the specified event will be triggered and that location of the CAM will be made available for another pending event.

Serial Port
The 8096 has an on-chip serial port similar to that on the 8051. It has one synchronous and three asynchronous modes. In the asynchronous modes baud rates of up to 187.5 Kbaud can be used, while in the synchronous mode rates up to 1.5 Mbaud are available. The chip has a baud rate generator which is independent of Timer 1 and Timer 2, so using the serial port does not affect any of the HSI, HSO or timer flexibility or functionality. Control of the serial port is provided through the SPCON/SPSTAT (Serial Port CONtrol/Serial Port STATus) register.

This register has some bits which are read only and others which are write only. Although the functionality of the port is similar to that of the 8051 the names of some of the modes and control bits are different. The way in which the port is used from a software standpoint is also slightly different since RI and TI are cleared after each read of the register.

The four modes of the serial port are referred to as mcdes 0, 1,2 and 3. Mode 0 is the synchronous mode and is commonly used to interface to shift registers for I/O expansion .In this mode the port outputs a pulse train on the TXD pin and either transmits or receives data on the RXD pin. Mode 1 is the standard asynchronous mode, 8 bits plus a stop and start bit are sent or received. Modes 2 and 3 handle 9 bits plus a stop and start bit. The difference between the two is, that in Mode 2 the serial port interrupt will not be activated unless the ninth data bit is a one; in Mode 3 the interrupt is activated whenever a byte is received. These two modes are commonly used for interprocessor communication.

Baud rates for all of the modes are controlled through the Baud Rate register This is a byte wide register which is loaded sequentially with two bytes and internally stores the value as a word. The least significant byte is loaded to the register followed by the most significant byte. The most significant bit of the baud value determines the clock source for the baud rate generator.

Serial port Mode 1 is the easiest mode to use as there is little to worry about except initialization and loading and unloading SBUF, the Serial port buffer.

A to D Converter
Analog inputs are frequently required in a microcontroller application. The 8097 has a 10-bit A to d converter that can use any one of eight input channels. The conversions are done using the successive approximation method and require 168 state times (42 microseconds with a 12 MHz clock). The results are guaranteed monotonic by design of the converter. This means that if the analog input voltage changes, even slightly, the digital value will either stay the same or change in the same direction as the analog input. When doing process control algorithms, it is frequently the changes in inputs that are required not the absolute accuracy of the value. For this reason, even if the absolute accuracy of a 10-bit converter is the same as that of an 8-bit converter, tha 10-bit monotonic converter is much more useful. Since most of the analog inputs conversion time, it is acceptable to use a capacitive filter on each input instead of a sample and hold. The 8097 does not have an internal sample and hold, so it is necessary the ensure that the input signal does not change during the conversion time. The input to the A/D must be between a few tenths of a volt of VCC. Using the A to D converter on the 8097 can be a very low software overhead task because of the interrupt and HSO unit structure.

The A to D can be started by HSO unit at a preset time. When the conversion is complete it is possible to generate an interrupt. By using these features the A to D can be run under complete interrupt control. The A to D can also be directly 16 controlled by software flags which are located in the AD_RESULT/AD_COMMAND Register.

PWM Register
True digital to analog converters are difficult to make on a microcontroller because of all of the digital noise and the necessity of providing an on chip, relatively high current, rail to rail driver. They also take up a fair amount of silicon area which can be better used for other features. The A to D converter does use a D to A but the currents involved are very small.

For many applications an analog output signal can be replaced by a Pulse width Modulated (PWM) signal. This signal can be easily generated in hardware and takes up much less silicon area then a true D to A. the signal is a variable duty cycle, fixed frequency waveform that can be integrated to provide an approximation to an analog output. The frequency is fixed at a period of 64 microseconds for a 12 MHz clock speed. Controlling the PWM simply requires writing the desired duty cycle value (an 8-bit value) to the PWM Register.

Converting the PWM signal to an analog signal varies in difficulty, depending upon the requirements of the system. Some systems, such as motors or switching power supplies actually require a PWM signal not a true analog one. For many other cases it is necessary only to amplify the signal so that it switches rail-to-rail, and then filter it. Switching rail-to-rail means that the output of the amplifier will be a reference value when the input is a logical one, and the output will be zero when the input is a logical zero. The filter can be a simple RC network or an active filter. If a large amount of current is needed a buffer is also required.

CONCLUSION

An overview of the MCS-96 family has been presented in this chapter. For the additional information on the 8096 one may refer the Microcontroller Intel Handbook.

UNSOLVED PROBLEMS

1. Why is the ALU of the 8096 is called RALU?
2. Discuss the features of 8096 family of micro controllers.
3. Write short 'notes on following 8096 family microcontroller features:

• High Speed Input Unit
• High Speed Output Unit
• Input/Output'
• A to D Converter

4. Explain memory mapping of 8096.
5. Distinguish between 8096 and 8051.