REGISTER BANKS
The 8051 uses 8 "R" registers which are used in many of its instructions. These "R" registers are numbered from 0 through 7 (R0, Rl, R2, R3, R4, R5, R6, and R7). Each register can be addressed by its address or by name when its bank is selected. Therefore R0 of bank 2 is R0 is bank 2 is currently selected or 10 irrespective of whether bank 2 is selected or not. During program execution bits RS0 and RS1 in the PSW determine which bank of registers is currently in use. On reset bank 0 is selected. These registers are generally used to assist in manipulating values and moving data from one memory location to another.

For example, to add the value of R4 to the Accumulator, we would execute the following instruction: .

ADD A, R4
Thus if the Accumulator (A) contained the value 6 and R4 contained the value 3,the Accumulator would contain the value 9 after this instruction was executed. 

However, as the memory map shows, the "R" Register R4 is really part of Internal RAM. Specifically, R4 is address 04h. Thus the above instruction accomplishes the same thing as the following operation:

ADD A, 04H
This instruction adds the value found in Internal RAM address 04h to the value of the Accumulator, leaving the result in the Accumulator. Since R4 is really Internal RAM 04h, the above instruction effectively accomplished the same thing.

As the memory map shows, the 8051 has four distinct register banks. When the 8051 is first booted up, register bank 0 (addresses 00h through 07h) is used by default. However. programmer may wish to use one of the alternate register banks; i.e., register banks 1,2, or 3 In this case, R4 will no longer be the same as Internal RAM address 04h. For example, if programmer instructs the 8051 to use register bank 3, "R" register R4 will now be synonymous with Internal RAM address 1Ch.

Note: The concept of register banks adds a great level of flexibility to the 8051, especially when dealing with interrupts. However, programmer should always keep in mind that the register banks reside in the first 32 bytes of Internal RAM. If someone only uses the first register bank (i.e. bank 0), he may use register banks not selected as general-purpose RAM.

BIT MEMORY
The 8051, being a communications-oriented microcontroller, gives the user the ability to access a number of bit variables. These variables may be either 1 or 0.There are 128 bit variables available to the user, numbered 00h through 7Fh. Addressable bits are useful when the program need only remember a binary event. The user may make use of these variables with commands such as SETB and CLR. .

For example, to set bit number 24 (hex) to lone would execute the instruction:


SETB 24H
It is important to note that Bit Memory is a part of Internal RAM. In fact, the 128 bit variables occupy the 16 bytes of Internal RAM from 20h through 2Fh. Thus, is someone writes the value FFh to Internal RAM address 20h he has effectively set bits 00h through 07h. That is to say that:


MOV 20H, #0FFH

Is equivalent to:

SETB 00h
SETB 01h
SETB 02h
SETB 03h
SETB 04h
SETB 05h
SETB 06h
SETB 07h

As illustrated, bit memory isn't a new type of memory. It's just a subset of Internal RAM. But since the 8051 provides special instructions to access these 16 bytes of memory on a bit by bit basis it is useful to think of it as a separate type of memory. The operations performed on Internal RAM can change the values of the bit variables. 

Note: If someone's program does not use bit variables, he may use Internal RAM locations 2Fh as general-purpose RAM.

Bit variables 00h through 7Fh are for user-defined functions in their programs. However, bit variables 80h and above are actually used to access certain SFRs on a bit-by-bit basis. For example, if output lines P0.0 through P0.7 are all clear (0) and someone want to turn on the P0.0 output line he may either execute:

MOV P0, #01H
Or may execute:

SETB 80H
Both these instructions accomplish the same thing. However, using the SETB command will turn on the P0.0 line without affecting the status of any of the other P0 output lines. 

The MOV command effectively turns off all the other output lines, which, in some cases, may not be acceptable.

Note: By default, the 8051 initializes the Stack Pointer (SP) to 07h when the microcontroller is booted. This means that the stack will start at address 08h and expand upwards. If someone will be using the alternate register banks (banks 1,2 or 3) he must initialize the stack pointer to an address above the highest register bank he will be using, otherwise the stack will overwrite his alternate register banks. Similarly, If someone will be using bit variables it is usually a good idea to initialize the stack pointer to some value greater than 2Fh to guarantee that bit variables are protected from the stack.

SPECIAL FUNCTION REGISTER (SFR) MEMORY
Special Function Registers (SFRs) are areas of memory that control specific functionality of the 8051 processor. For example, four SFRs permit access to the 8051's 32 input/output lines. Another SFR allows a program to read or write to the 8051'sserial port. Other SFRs allow the user to set the serial baud rate, control and access timers, and configure the 8051's interrupt system.

When programming, SFRs have the illusion of being Internal Memory. For example, if someone wants to write the value "1" to Internal RAM location 50 hex then he would execute the instruction:

MOV 50H, #01H
Similarly, if someone wants to write the value "1" to the 8051's serial port he would write this value to SBUF SFR, which has an SFR address of 99 Hex. Thus, to write the value "1" to the serial port one would execute the instruction:

MOV 99H, #01H
As one can see, it appears that the SFR is part of Internal Memory. This is not the case. When using this method of memory access (it's called direct address), any instruction that has an address of 00h through 7Fh refers to an Internal RAM memory address; any instruction with an address of 80h through FFh refers to anSFR control register.

Note: SFRs are used to control the way the 8051 functions. Each SFR has a specific purpose and format. Not all addresses above 80h are assigned to SFRs. However, this area may not be used as additional RAM memory even if a given address has not been assigned to an SFR.

COUNT TIME OF TIMER
First, it's worth mentioning that when a timer is in interval timer mode (as opposed to event counter mode) and correctly configured, it will increment by 1 every machine cycle. As we know, a single machine cycle consists of 12 crystal pulses. Thus a running timer will be incremented:

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