The Idle mode freezes the CPU while allowing- the RAM. timer/counters, serial port, and interrupt system to continue functioning .The Power Down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative:

IDLE MODE
The idle mode is activated by setting the IDL bit high. An instruction that sets PCON register bit 0 ( PCON.0) bring microcontroller in Idle mode. The idle mode causes all program execution to stop. Internal RAM contents are reserved and the oscillator continues to run but is blocked from-the CPU. The timers and the UART continue to function as normal. 

Idle mode is terminated by the activation of any interrupt or by a hardware reset. Activation of any enable interrupt terminates Idle mode by clearing PCON.0. Upon completion of the interrupt service routine, execution will continue from the instruction following the instruction which set the IDLE bit. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.

POWER DOWN MODE
The power down mode is activated by setting the PDWN bit high. The instruction that sets PCON.1 invokes Power Down, is the last instruction executed. in the Power Down mode, the on-chip oscillator stopped. Thus, the timers and the UART' as well as software execution are halted. The on-chip RAM and Special Function Registers retain their values until the Power. Down mode is terminated. As long as a minimum of 2 volts are applied to the chip (assuming a five volt part) the contents of the internal RAM will be preserved.

The only way to force the processor out of power down mode is by applying a power on reset. Reset redefines the SFRs but does not change the on-chi RAM. The reset should not be activate before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.

Before entering the Power Down mode, the contents of the Carry Bit and B. 7 must be equal and at power on, the voltage on VCC and RST must come up at the same time for a proper start-up.

ADDRESSING MODES
An instruction is divided in to groups of bits, or fields, with one field, called the operation code (opcode), indicating what the computer is to do and other fields called the operands, indicating the information needed by the instruction in carrying out its task.

The way in which an operand is specified is called its addressing mode. In simple words, an "addressing mode" refers to how one is addressing a given memory location. In summary, the addressing modes are as follows, with an example of each:

Immediate Addressing MOV A, #20h
Direct Addressing MOV A, 30h
Register Addressing MOV A, RO
Indirect Addressing MOV A, @RO

Each of these addressing modes provides important flexibility.

IMMEDIATE ADDRESSING
Immediate addressing is so-named because the value to be stored in memory immediately follows the operation code (opcode) in memory. That is to say, the instruction itself dictates what value will be stored in memory. The mnemonic for immediate data is the pound sign (#).
Example:
MOV Rn, #data; copy the immediate data byte 'data' to register Rn 
MOV A, #data; copy the immediate data byte 'data' to A register
For example, the instruction:
MOV A, #20h

This instruction uses Immediate Addressing because the Accumulator will be loaded
With the value that immediately follows; in this case 20 (hexadecimal).

Immediate addressing is very fast since the value to be loaded is included in the Instruction. However, since the value to be loaded is fixed at compile-time it is not very flexible.

DIRECT ADDRESSING 
Direct addressing is so-named because the value to be stored in memory is obtained by directly another memory location. The SFRs and all 128 bytes of internal RAM may ly using the single-byte address.

Example:
MOV A, direct; copy data from direct address 'direct' to register A
MOV Rn, direct; copy data from direct address 'direct' to register Rn
For example:
MOV A 30h 
This instruction will read the data out of Internal RAM address 30 (hexadecimal) and store it in the Accumulator.

It is for programmer to use a name for an SFR or absolute address for the SFR.
For example:
MOV 80h, #0b3h
MOV p0, #0b3h; both
MOV P0, #Ob3h; both moves a constant number into port 0.
Direct addressing is generally fast, although the value to be loaded isn't included in the
Instruction, it is quickly accessible since it is stored in the 8051's Internal RAM. It is also much. More flexible than Immediate Addressing since whatever value to be loaded is found at the given address, which may be variable.

Also, it is important to note that when using direct addressing any instruction which
Refers to an address between 00h and 7Fh is referring to Internal Memory. Any instruction which refers to an address between 80h and FFh is referring to the SFR control registers that control the 8051 microcontroller itself.

REGISTER ADDRESSING
Some register names may be used as part of the mnemonic as sources or destinations of data. Register A, R0 to R7 and DPTR may be names as the as the part of the mnemonic.

Example:
MOV Rn, A; copy data from register A to register Rn
MOV A, Rn; copy data from register Rn to register A
For example:
MOV A, R0
This instruction will read the data out of register R0 and store it in the Accumulator.
In the register addressing mode, register-to-register moves occur between registers A and R0 to R7.

INDIRECT ADDRESSING
Indirect addressing is a very powerful addressing mode which in many cases provides an exceptional level of flexibility. It uses a register to hold the final address, known as pointing register (Ri). The mnemonic for indirect addressing is the "at" sign (@). Indirect addressing
appears as follows:
MOV A, @Ri; copy the contents of the address in Ri to A register
MOV @ RI, #data; copy the immediate byte 'data' to the address in Ri.
For example:
MOV A,@RO

This instruction causes the 8051 to analyze the value of the RO register. The 8051 will Then load the accumulator with the value from Internal RAM which is found at the address indicated by R0.

For example, let's say R0 holds the value 40h and Internal RAM address 40h holds. The value 67h. When the above instruction is executed the 8051 will check the value of R0. Since R0 holds 40h the 8051 will get the value out of Internal RAM address 40h (which holds 67h) and store it in the Accumulator. Thus, the Accumulator ends up holding 67h.

Indirect addressing always refers to Internal RAM, it never refers to an SFR.

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