INTRODUCTION

High speed digital signals are frequently encountered in modern control applications In addition there is often a requirement for high speed 16-bit and 32-bit precision in calculations. The MCS-96 generically referred to as the 8096 is designed to be used in applications which require high speed calculations and fast I/O operations.

The 8096 is a 16-bit microcontroller with dedicated I/O subsystems and a complete set of 16-bit arithmetic instructions including multiply and divide operations.

8096 OVERVIEW

 General Description
Unlike microprocessors microcontrollers are generally optimized for specific applications. Intels 8048 was optimized for general control tasks while the 8051 was optimized for 8-bit math and single bit boolean operations. The 8096 has been designed for high speed high performance control applications. ;Because it has been designed for these applications the 8096 architecture is different from that of the 8048 or 8051.

There are two major sections of the 8096 the CPU section and the I/O section. Each of these sections can be subdivided into functional blocks .

accumulator. Any of the locations in the register file can be used for sources or destination for most of the instructions. This is called a register to register architecture. The ALU of 8096 is therefore known as RALU .Many of the instructions can also use bytes or words from anywhere in the 64K byte address space as operands A memory map.
In the lower 24 bytes of the register file are the register mapped I/O control locations also called Special Function Registers or SFRs. These registers are used to control the on-chip I/O features The remaining 232 bytes are general purpose RAM the upper 16 of which can _ kept alive using a low current power-down mode.

The layout of the register mapped I/O. Some of these registers serve two functions one if they are read from and another if they are written to. More information about the use of these registers is included in the description of the features which they control.

I/O Features
Many of the I/O features on the 8096 are designed to operate with little CPU intervention. A list of the major I/O functions is shown in Figure. The Watchdog Timer is an internal timer which can be used to reset the system if the software fails to operate properly. The Pulse Width-Modulation (PWM) output can be used as a D to A, a motor driver or for many other purposes. The A to D converter (ADC) has 8 multiplexed inputs and 10-bit resolution. The serial port has several modes and its own baud rate generator. The High Speed I/O section includes a 16-bit timer, a 16-bit counter, a 4-input programmable edge detector, 4 software timers and a 6-output programmable event generator.

THE PROCESSOR SECTION

Operations
The 8096 has 100 instructions some of which operate on bits, some on bytes, some on words and some on longs (double words). All of the standard logical and arithmetic functions are available for both byte and word operations. Bit operations and long operations are provided for some instructions. There are also flag manipulation instructions as well as jump and call instructions. A full set of conditional jumps has been included to speed up testing for various conditions. Bit operations are provided by the Jump Bit and Jump Not Bit instructions as well as by immediate masking of bytes .These bit operations can be performed on any of the bytes in the register file or on any of the special function registers. The fast bit manipulation of the SFRs can provide rapid I/O operations. A symmetric set of byte and word operations make up the majority of the 8096 instruction set. The assembly language for the 8096 (ASM-96) uses a "B" suffix on a mnemonic to indicate a byte operation without this suffix a word operation is indicated. Many of these operations can have one, two or three operands.

An example of a one operand instruction would be
NOT Value 1
A two operand instruction would have the form
ADD Value 2, Value1
A three operand instruction might look like
MUL Value 3 ,Value 2, Value 1

The three operand instructions combined with the register to register architecture almost eliminate the necessity of using temporary registers This results in a faster processing time than machines that have equivalent instruction execution times but use a standard architecture. 

Long (32-bit) operations include shifts, normalize and multiply and divide. The word divide is a 32-bit by 16-bit operation with a 16-bit quotient and 16-bit remainder. The word multiply is a word by word multiply with a long result. Both of these operations car. Be done in either the signed or unsigned mode. The direct unsigned modes of these instructions take only 6.5 microseconds. A normalize instruction and bit flag have been included in the instruction set to provide hardware support for the software floating point.

Addressing Modes
One operand of most of the instructions can be used with anyone of six addressing modes. These modes increase the flexibility and overall execution speed of the 8096. The addressing modes are:

• Register-direct addressing
• Immediate addressing
• Indirect addressing
• Indirect with auto-increment addressing
• Long indexed addressing
• Short indexed addressing

The fastest instruction execution is gained by using either register direct or immediate addressing. Register-direct addressing is similar to normal direct addressing except the only addresses in the register file or SFRs can be addressed. The indexed mode is used to directly address the remainder of the 64K address space. Immediate addressing operates as Would be expected using the data following the opcode as the operand. Both of the indirect addressing modes use the value in a word register as the address of the operand .If the indirect auto-increment mode is used then the word register is incremented by one after a byte access or by two after a word access. This mode is particularly useful for accessing lookup tables. Access to any of the locations in the 64K address space can be obtained by using the long indexed addressing mode. In this mode a 16-bit 2's complement value is added to the contents of a word register to form the address of the operand. By using the zero register as the index the assembler can accept "direct" addressing to any location. The zero register is located at 0000H and always has a value of zero. A short indexed mode is also available to save some time and code. This mode uses an 8-bit 2's complement number as the offset instead of a 16-bit number.

Assembly Language
The multiple addressing modes of the 8096 make it easy to program in assembly language and provide an excellent interface to high level languages. The instructions accepted by the assembler consist of mnemonics followed by either addresses or data. The addresses or data are given in different formats depending on the addressing mode. 

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